Staff/Principal Physical Design Engineer - SoC EMIR Expert
Description
Astera Labs is seeking a Physical Design Engineer at Staff/Principal level with deep expertise in EMIR for developing advanced SoCs in the AI connectivity on-chip domain. The position offers significant technical ownership in a new team in Tel Aviv, with the role focused on voltage drop analysis, electromigration, and power infrastructure in high-performance chips for demanding AI environments. Required: 10+ years of experience in EMIR analysis using tools such as RedHawk and Voltus, deep understanding of advanced processes (7nm down to 3nm), and experience with Place & Route and power grid design. The candidate will be the point of reference for all IR issues and will have the knowledge to identify issues early in the development cycle. Location: Tel Aviv · Department: ASIC Engineering To apply: On the company website, using the button below
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Location
Tel Aviv
Staff/Principal Physical Design Engineer - SoC EMIR Expert
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