Description

Physical Design Engineer as part of a Backend team at a leading startup in Israel, you will be responsible for the physical implementation of complex AI interconnect chips. The role includes executing the workflow from Synthesis through Place & Route to Signoff, while ensuring compliance with extreme performance and power requirements. Basic understanding of RTL-to-GDS flow is required, along with experience in advanced processes (7nm and below), and proficiency with tools such as STA, LEC, DRC, and EMIR. Experience with scripting (TCL/Python) and knowledge in areas such as Power Analysis or DFT is recommended. Location: Tel Aviv · Department: ASIC Engineering To apply: On the company website, through the button below

Details

Location

Tel Aviv